A 10b 1GS/s Time-Interleaved SAR ADC With Digital Background Calibration
This thesis consists of two main parts: MATLAB-based theoretical analysis of a TI SAR ADC, and the design of a 10-bit 1 GS/s TI SAR ADC prototype with digital background calibration. For the TI ADC analysis, the effects of typical nonidealities, including offset, gain, and timing skew, are evaluated. In the circuit prototype, an 8-channel 125 MS/s SAR sub-ADC architecture is used. Each sub-ADC ad
