Exjobbspresentation: Pipeline ADC PN-Dither LMS Background Calibration: FPGA and ASIC Digital Back-End Implementation
12 juni 2026 10:15 till 11:00 | Exjobbspresentation Xingyu Wang presenterar sitt exjobb Pipeline ADC PN-Dither LMS Background Calibration: FPGA and ASIC Digital Back-End Implementation den 12 juni, 10:15 i E2349. This thesis presents a complete digital back-end implementation of a PN-dither least-mean-squares (LMS) background calibration scheme for a 12-bit, 500 MS/s pipeline analog-to-digital con
